Summer school on “Analog, mixed-signal design and RFICs"

English

Celebrating Vietnam Science and Technology Day 2019, the 15th year anniversary and the 20th traditional day, VNU University of Engineering and Technology (VNU-UET) organized the summer school on "Analog, mixed-signal design and RFICs" at E3 building from May 7 to May 11, 2019.

Dr. Xi Jiang – the expert from Synopsys giving his presentation on Analog, mixed-signal design, RF ICs, etc. using Synopsys tools.

Vietnamese dynamic contents: 

The 3rd time SISLAB students participated in the final round of LSI design contest

English

On March 8, 2019, a group of three students from VNU Key Laboratory for Smart Integrated Systems (Tran Xuan Tuyen, Nguyen Luong Bang, Pham Dinh Trung) presented their research results in the 22th LSI Design Contest in Okinawa, Japan. This is the 3rd time VNU University of Engineering and Technology students were provided full sponsors covering flight tickets and accommodation fee to participate as the finalists of the International LSI Design Contest, which is annually hosted in Japan.

Tran Xuan Tuyen and his rehearsal at SISLAB before the round in Okinawa.

LSI Design Contest in Okinawa this year come back with a new design challenge which is "Deep Learning" (Backpropagation). In 2018, SISLAB students were the First Runner-up of the contest.

Vietnamese dynamic contents: 

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